The design of discrete Fourier transform and convolution algorithms for RISC architectures.
Item
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Title
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The design of discrete Fourier transform and convolution algorithms for RISC architectures.
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Identifier
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AAI9108112
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identifier
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9108112
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Creator
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Granata, John A.
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Contributor
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Adviser: Michael Conner
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Date
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1990
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Language
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English
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Publisher
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City University of New York.
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Subject
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Engineering, Electronics and Electrical
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Abstract
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The RISC architecture has recently reappeared and has become an important trend in modern computing. By eliminating complex micro-coded controllers RISCs not only reduce the time needed for a basic compute cycle, but also free chip area for features like dedicated hardware multipliers, addressing units, and on-chip cache memory. The problem of designing efficient DFT and convolution algorithms that fully exploit the capabilities of these new architectures is studied. Extensive use of the tensor product is made throughout. Connections between certain tensor product constructs and RISC architectures are established and shown to offer enhanced algorithmic performance. The scope of these ideas is then extended to include a more general class of recursive fast algorithms. This is done by presenting tensor product representations of several other important transforms.
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Type
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dissertation
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Source
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PQT Legacy CUNY.xlsx
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degree
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Ph.D.